Request for sweRV micro architecture
I have been an active member following the SweRV development since the past 4 months.
I have a keen interest in the RISC-V architecture since its open source release.
understanding the micro-architecture of SweRV has been a tough task for me. IT would be really helpful if any more documents could be released or sent to me for further understanding.
Thanks & Regards
Rajoo Kumar Gupta